| Nominal Frequency |
80.000MHz to 161.1328MHz
Some frequencies within this range may not be available. |
| Frequency Tolerance/Stability |
(Inclusive of all conditions: Calibration Tolerance at 25°C, Frequency Stability over the Operating Temperature Range,
Supply Voltage Change, Output Load Change, First Year Aging at 25°C, Shock, and Vibration)
±100ppm Maximum
±50ppm Maximum
±25ppm Maximum
±20ppm Maximum
|
| Operating Temperature Range |
0°C to +70°C
-40°C to +85°C
|
| Supply Voltage (VDD) |
3.3VDC ±5% |
| Input Current |
66mA Maximum |
| Output Voltage Logic High (VOH) |
1.43VDC Typical, 1.6VDC Maximum
|
| Output Voltage Logic Low (VOL) |
1.1VDC Typical, 0.9VDC Minimum
|
| Differential Output Voltage (VOD) |
247mV Minimum, 330mV Typical, 454mV Maximum |
| Offset Voltage (VOS) |
1.125V Minimum, 1.250V Typical, 1.375V Maximum |
| Differential Output Error (DVOD) |
50mV Maximum |
| Offset Error (DVOS) |
50mV Maximum |
| Duty Cycle |
Measured at 50% of waveform or at the crossing point
50 ±5(%)
|
| Rise Time/Fall Time |
Measured at 20% to 80% of Waveform
300pSec Typical, 700pSec Maximum
|
| Output Logic Type |
LVDS |
| Load Drive Capability |
100 Ohms Between Output and Complementary Output |
| Phase Noise |
All Values are Typical
-60dBc/Hz at 10Hz Offset, -95dBc/Hz at 100Hz Offset, -125dBc/Hz at 1kHz Offset, -143dBc/Hz at 10kHz Offset, -145dBc/Hz at 100kHz Offset, -145dBc/Hz at 1MHz Offset, -146dBc/Hz at 10MHz Offset
|
| Logic Control / Additional Output |
Tri-State and Complementary Output |
| Tri-State Input Voltage (Vih and Vil) |
Vih of 70% of VDD Minimum or No Connect to Enable Output and Complementary Output, Vil of 30% of VDD Maximum to Disable High Impedance Output and Complementary Output |
| Standby Current |
Without Load
10µA Maximum
|
| Phase Jitter (RMS) |
Fj=12kHz to 20MHz; Random
0.4pSec Typical, 1pSec Maximum |
| Storage Temperature Range |
-55°C to +125°C |
| Start Up Time |
10mSec Maximum |